In many applications, DRAM (Dynamic Random Access Memory) stores data and instructions used by one or more processing units. Whereas the processing units are often integrated on a single silicon die (chip), some of the DRAM, or the entire DRAM, may be integrated on the same die as the processing units, or some of the DRAM may be integrated on a separate die that is electrically coupled to the die containing the processing units.
DRAM that is integrated on a die separate from the die containing the processing units that access the DRAM may be termed external memory. External memory may be designed to be relatively low in cost but with high density, where density may refer to the number of bytes per area of silicon die, or the total number of bytes that may be stored and accessed. However, the tradeoff is that conventional electrical coupling between the external memory on one die and the processing units on another die may not have sufficient bandwidth to support high speed communication between the external memory and the processing units.
In some applications, DRAM may be embedded on the same die as the processing units that access the DRAM, abbreviated as eDRAM (embedded DRAM). Embedding allows for wider busses and access speed, so that eDRAM is a relatively low latency memory. Fabricating processing units, often as CMOS (Complementary Metal Oxide Semiconductor) logic, is relatively costly compared to the simpler process of fabricating DRAM because more processing steps are involved. Accordingly, adding processing steps to fabricate eDRAM embedded with logic (processing units) adds to the overall fabrication cost.
Furthermore, embedding eDRAM on a die with other processing units consumes valuable die area. Because the cost per unit die increases substantially as die area increases, fabricating a die comprising both eDRAM and CMOS logic may not be economically viable for some applications.